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  ? semiconductor components industries, llc, 2013 november, 2013 ? rev. 1 1 publication order number: NCP331/d NCP331 soft-start controlled load switch with auto discharge the NCP331 is a low ron n ? channel mosfet controlled by a soft ? start sequence of 2 ms for mobile applications. the very low r ds(on) allows system supplying or battery charging up to dc 2a.the device is enable due to external, active high, enable pin. due to a current consumption optimization, leakage current is drastically decreased from the battery connected to the device, allowing long battery life. features ? 1.8 v ? 5.5 v operating range ? 33 m  n mosfet ? dc current up to 2 a ? peak current up to 5 a ? built ? in soft ? start 2 ms ? reverse voltage protection ? output discharge ? en logic pin: active high ? esd ratings: machine model = b human body model = 2 ? tsop23 ? 6 package ? this is a pb ? free device typical applications ? mobile phones ? tablets ? digital cameras ? gps ? computers enx en 0 dcdc converter platform ic?n ldo ls or NCP331 in 5 /en 3 in 6 out 1 gnd 4 out 2 figure 1. typical application circuit http://onsemi.com tsop ? 6 sn suffix case 318g see detailed ordering and shipping information on page 7 of this data sheet. ordering information 331 = specific device code a = assembly location y = year w = work week  = pb ? free package marking diagram (note: microdot may be in either location) 1 331ayw   1 out out en in in gnd pinout diagram (top view)
NCP331 http://onsemi.com 2 pin function description pin name pin number type description in 5,6 power power ? switch input voltage; connect a 0.1  f or greater ceramic capacitor from in to gnd as close as possible to the ic. gnd 4 power ground connection. en 3 input enable input, logic high turns on power switch. out 1,2 output power ? switch output; connect a 0.1  f ceramic capacitor from out to gnd as close as possible to the ic is recommended. block diagram charge pump en block control logic gate driver and soft start control in en out gnd figure 2. block diagram
NCP331 http://onsemi.com 3 maximum ratings rating symbol value unit in, out, en, pins: v en, v in, v out ? 0.3 to +7.0 v from in to out pins: input/output v in, v out ? 7.0 to +7.0 v maximum junction temperature range t j ? 40 to +125 c storage temperature range t stg ? 40 to +150 c esd withstand voltage human body model (hbm), model = 2, machine model (mm) model = b, (note 1) vesd 2500 200 v moisture sensitivity (note 2) msl level 1 stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device function ality should not be assumed, damage may occur and reliability may be affected. 1. according to jedec standard jesd22 ? a108. 2. moisture sensitivity level (msl): 1 per ipc/jedec standard: j ? std ? 020. operating conditions symbol parameter conditions min typ max unit v in operational power supply 1.8 5.5 v v en enable voltage 0 5.5 t a ambient temperature range ? 40 25 + 85 c t j junction temperature range ? 40 25 + 125 c c in decoupling input capacitor 0.1  f c out decoupling output capacitor 0.1  f r  ja thermal resistance ? junction ? to ? air (notes 3 and 4) 305 c/w i out maximum dc current 2 a p d power dissipation rating (note 7) t a 25 c 0.37 w t a = 85 c 0.13 w functional operation above the stresses listed in the recommended operating ranges is not implied. extended exposure to stresse s beyond the recommended operating ranges limits may affect device reliability. 3. the r  ja is dependent of the pcb heat dissipation. 4. the maximum power dissipation (p d ) is given by the following formula:
NCP331 http://onsemi.com 4 electrical characteristics min & max limits apply for t a between ? 40 c to +85 c and t j up to + 125 c for v in between 1.8 v to 5.5 v (unless otherwise noted). typical values are referenced to t a = + 25 c and v in = 5 v. symbol parameter conditions min typ max unit power switch r ds(on) static drain ? source on ? state resistance v in = 3 v, v in = 5 v, tsop package t j = 25 c 33 m  ?40 c < t j < 125 c 60 t en gate turn on v in = 3.3 v from en vih to v out rising. (note 5), c load = 0.1  f, r load = 10  60 200  s v in = 3 .0 v from en vih to 10% v out rising. c load = 1  f, r load = 25  278 500  s t r output rise time v in = 3.3 v c load = 0.1  f, r load = 10  (note 5), from en to 95% v out 1.2 2.05 3 ms v in = 3.0 v c load = 1  f, r load = 25  (note 6), from 10% to 90% v out 1. 00 1.65 2.36 tdis disable time v in = 3.0 v from en high to low to v out falling 0.3 t f output fall time v in = 3 v c load = 1  f, r load = 25  (note 6) 0.1 0.18 0.5 t off output off time v in = 3 v c load = 1  f, r load = 25  (notes 6 & 7), from en to 10% v out 0.3 0.5 0.8 enable input en v ih high ? level input voltage 1.15 v v il low ? level input voltage 0.85 v r pd en pull ? down resistor 1.1 1.5 1.8 m  r dis output discharge resistor 200 400 600  reverse ? leakage protection i rev reverse ? current protection v in = 0 v, v out = 4.2 v (part disable), t a = 25 c 0.3 1.2  a quiescent current istb standby current en low, vin = 3 v 1.3 3  a iq current consumption no load, en high, vin = 3 v 11 15  a product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 5. guaranteed by correlation with 3.0 v production test. 6. parameters are guaranteed for c load and r load connected to the out pin with respect to the ground. 7. guaranteed by t fall and r discharge tests.
NCP331 http://onsemi.com 5 timings figure 3. timings t en t r t on t off t dis t f v in en v out
NCP331 http://onsemi.com 6 typical characteristics figure 4. r ds(on) versus temperature ? 50 ? 25 0 25 50 75 100 125 60 55 50 45 40 35 30 25 20 temperature ( c) r ds(on) (m  ) v in = 5.0 v v in = 1.8 v v in = 3.0 v v in = 5.5 v figure 5. r ds(on) versus input voltage, ambient temperature 1.5 2 2.5 3 4 4.5 5 5.5 50 45 40 35 30 25 20 v in (v) r ds(on) (m  ) 3.5 10 v in (v) i stb (  a) 1.5 2.0 2.5 3.0 4.0 4.5 5.0 5.5 3.5 1.0 t a = ? 40 c t a = 25 c t a = 85 c 9.0 8.0 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0 figure 6. standby current versus input voltage t a = ? 40 c t a = 25 c t a = 85 c 30 v in (v) iq (  a) 25 20 15 10 5 0 1.5 2.0 2.5 3.0 4.0 4.5 5.0 5.5 3.5 1.0 figure 7. quiescent current versus input voltage
NCP331 http://onsemi.com 7 functional description overview the NCP331 is a high side n channel mosfet power distribution switch designed to connect external voltage directly to the system. enable input enable pin is an active high. the part is in disable mode when en is tied to low. power mosfet is opened. pull down resistor is placed to maintained the part off if en pin is not externally driven. the parts becomes in enable mode if en is tied high and power mosfet is turned of after ten and t rise times. auto discharge nmos fet is placed between the output pin and gnd, in order to discharge the application capacitor connected on out pin. the auto ? discharge is activated when en pin is set to low level (disable state). the discharge path (pull down nmos) stays activated as long as en pin is set at low level. blocking control the blocking control circuitry switches the bulk of the power nmos. when the part is off (no v in or en tied to gnd externally), the body diode limits the leakage current i rev from out to in. in this mode, anode of the body diode is connected to in pin and cathode is connected to out pin. in operating condition, anode of the body diode is connected to out pin and cathode is connected to in pin preventing the discharge of the power supply. application information power dissipation the device?s junction temperature depends on different contributor factor such as board layout, ambient temperature, device environment, etc... yet, the main contributor in term of junction temperature is the power dissipation of the power mosfet. assuming this, the power dissipation and the junction temperature in normal mode can be calculated with the following equations: p d  r ds(on)  (i out ) 2 p d = power dissipation (w) r ds(on) = power mosfet on resistance (  ) i out = output current (a) t j  p d  r  ja  t a t j = junction temperature ( c) r  ja = package thermal resistance ( c/w) t a = ambient temperature ( c) pcb recommendations the NCP331 integrates an up to 2a rated nmos fet, and the pcb design rules must be respected to properly evacuate the heat out of the silicon. by increasing pcb area, the r  ja of the package can be decreased, allowing higher power dissipation . ordering information device marking package shipping ? NCP331snt1g 331 tsop ? 6 (pb ? free) 3000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
NCP331 http://onsemi.com 8 package dimensions ? 6 case 318g ? 02 issue v 23 4 5 6 d 1 e b e1 a1 a 0.05 notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. maximum lead thickness includes lead finish. minimum lead thickness is the minimum thickness of base material. 4. dimensions d and e1 do not include mold flash, protrusions, or gate burrs. mold flash, protrusions, or gate burrs shall not exceed 0.15 per side. dimensions d and e1 are determined at datum h. 5. pin one indicator must be located in the indicated zone. c *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* dim a min nom max millimeters 0.90 1.00 1.10 a1 0.01 0.06 0.10 b 0.25 0.38 0.50 c 0.10 0.18 0.26 d 2.90 3.00 3.10 e 2.50 2.75 3.00 e 0.85 0.95 1.05 l 0.20 0.40 0.60 0.25 bsc l2 ? 0 1 0 1.30 1.50 1.70 e1 e recommended note 5 l c m h l2 seating plane gauge plane detail z detail z 0.60 6x 3.20 0.95 6x 0.95 pitch dimensions: millimeters m on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other inte llectual property. a listing of scillc?s product/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typical s? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 NCP331/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative


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